16.USB Controller

16.1 Introduction to USB Controller

The CH559 has a built-in USB controller and dual USB transceivers. The features are as follows:

1. Supports USB Host and USB Device functions
2. Supports USB 2.0 full speed 12Mbps or low speed 1.5Mbps
3. Support USB control transfers, bulk transfers, interrupt transfers, iso transfers
4. Provide dual-port Root-HUB in USB host mode, can manage two USB devices at the same time
5. Support data packets up to 64 bytes, built-in FIFO, support interrupts and DMA

The USB related registers of the CH559 are divided into 3 groups, and some of the registers are multiplexed between host and device mode.

1. USB global register
2. USB device controller register
3. USB host controller register

16.2 Global Register

USB Receive Length Register (USB_RX_LEN):

USB Interrupt Flag Register (USB_INT_FG bit addressable):

USB Interrupt Status Register(USB_INT_ST):

USB Miscellaneous Status Register (USB_MIS_ST):

USB interrupt enable register (USB_INT_EN):

USB Control Register (USB_CTRL):

USB device address register (USB_DEV_AD):

16.3 Device Registers In USB device mode

The CH559 provides five groups of two-way endpoints 0, 1, 2, 3, and 4. The maximum packet size for each endpoint is 64 bytes. Endpoint 0 is the default endpoint used for control (SETUP) tranfers, sending and receiving uses the same 64-byte data buffer.
Endpoint 1, Endpoint 2, Endpoint 3 each includes a sending endpoint IN and a receiving endpoint OUT. Each Endpoint can have its own independent 64-byte buffer or double 64-byte data buffer, which supports control, bulk, interrupt and iso transfers. Endpoint 4 is a bit different since it has no own DMA control but shares DMA and with Endpoint 0. It supports control, bulk, interrupt and iso transfers.

Each pair of endpoints has its own control register UEPn_CTRL and its own transfer size register UEPn_T_LEN (n = 0/1/2/3/4), which is used to set the toggle bit of the endpoint in response to OUT transaction, IN transaction and the sending data Length, etc.
The pull-up resistor of the USB bus, as necessary for a USB device, can be set by software at any time. When bUC_DEV_PU_EN is set in the USB control register USB_CTRL, the CH559 internally connects a 1k5 pullup to the DP pin or DM pin according to the settings of bUD_LOW_SPEED and thus enable the USB device function as low or full speed device.

In case of any USB event such as USB bus reset, USB bus suspend, wake-up, USB Setup or USB transfer event, the USB protocol processor will set the corresponding interrupt flag and generates an interrupt request. The application has to query the interrupt flag register USB_INT_FG to determine the event, or if USB interrupt mode is used take the neccessary actions in an USB interrupt service routine.

There are 3 major events which should be handled by the firmware:

• UIF_BUS_RST: issued by the host to reset the usb device
• UIF_SUSPEND: issued by the host to put the usb device into sleep mode
• UIF_TRANSFER: data transfers to the verious endpoints

For UIF_TRANSFER the USB interrupt status register USB_INT_ST provides information about type of transfer in the bUIS_TOKEN field and endpoint number in the MASK_UIS_ENDP field. Both fields have to be evaluated to perform the next action on the bus. If the toggle bit bUEP_R_TOG of the OUT transaction for the endpoint is set in advance, U_TOG_OK or bUIS_TOG_OK can be used to check whether toggle bit of the actual received data packet matches the expected toogle bit of the endpoint. If the bit is set data packe is valid. If not the data the data should be discarded.

Each time the USB send or receive interrupt is processed, the toggle bit of the corresponding endpoint should be modified correctly to synchronize the next data packet sent and check whether the next received data packet is synchronized. In addition, by setting bUEP_AUTO_TOG, the toggle bit will change automatically after each successful transmission or successful reception. The data to be sent by each endpoint is in its own buffer, and the size of the data to be sent is independently set in UEPn_T_LEN. The data received by each endpoint is in its own buffer, but the length of the received data is all in the USB receive length Register USB_RX_LEN, which can be distinguished according to the current endpoint number when USB receive interrupt

Endpoint n Control Register (UEPn_CTRL):

Endpoint n Transmit Length Register (UEPn_T_LEN):

USB Device Physical Port Control Register (UDEV_CTRL):

USB endpoint 1, 4 mode control register (UEP4_1_MOD):

The combination of bUEP4_RX_EN and bUEP4_TX_EN controls the data buffering of USB endpoints 0 and 4 Zone mode, refer to the table below.

USB endpoint 2, 3 mode control register (UEP2_3_MOD):

Controlled by bUEPn_RX_EN and bUEPn_TX_EN and bUEPn_BUF_MOD (n = 1/2/3) respectively. For the data buffer mode of USB endpoints 1, 2, and 3, refer to the following table. Among the dual 64-byte buffer modes, the first 64-byte buffer is selected according to bUEP_*_TOG = 0 during USB data transfer, and the last 64-byte buffer is selected according to bUEP_*_TOG = 1 to realize automatic switching.

USB Endpoint n Buffer Start Address (UEPn_DMA) (n = 0/1/2/3):

16.4 Host Register In USB host mode

The CH559 provides a set of bidirectional host endpoints, including a sending endpoint OUT and a receiving endpoint IN. The maximum data packet length is 64 bytes. It supports control transfers, bulk transfers, interrupt transfers and iso transfers.
Every USB transaction initiated by the host endpoint always sets the interrupt flag UIF_TRANSFER automatically after processing is complete. The application program can directly query or analyze and analyze the interrupt flag register USB_INT_FG in the USB interrupt service routine, and perform corresponding processing according to each interrupt flag; and, if UIF_TRANSFER is valid, then it needs to continue to analyze the USB interrupt status register USB_INT_ST. The response PID identifier MASK_UIS_H_RES of the transmission transaction is processed accordingly. If the synchronization trigger bit bUH_R_TOG of the IN transaction of the host receiving endpoint is set in advance, you can use U_TOG_OK or bUIS_TOG_OK determines whether the synchronization trigger bit of the currently received data packet matches the synchronization trigger bit of the host receiving endpoint. If the data is synchronized, the data is valid; if the data is not synchronized, the data should be discarded. Each time the USB send or receive interrupt is processed, the synchronization trigger bit of the corresponding host endpoint should be modified correctly to synchronize the next data packet sent and detect whether the next received data packet is synchronized; in addition, by setting bUEP_AUTO_TOG It can be realized that the corresponding synchronization trigger bit is automatically flipped after sending successfully or receiving successfully.

The USB host token setting register UH_EP_PID is shared with the the USB endpoint 1 control register in the USB device mode. It is used to set the endpoint number of the target device to be operated and the token PID packet identifier of the USB transfer transaction. The data corresponding to the SETUP token and the OUT token are provided by the host sending endpoint. The data to be sent is in the UH_TX_DMA buffer and the length of the data to be sent is set in UH_TX_LEN; the data corresponding to the IN token is returned by the target device to the host Receiving endpoint, the received data is stored in the UH_RX_DMA buffer, and the length of the received data is stored in USB_RX_LEN.

USB host auxiliary setup register (UH_SETUP):

USB Host Receive Endpoint Control Register (UH_RX_CTRL):

USB host token setting register (UH_EP_PID):

USB Host Send Endpoint Control Register (UH_TX_CTRL):

USB Host Send Length Register (UH_TX_LEN):

USB host HUB port status register (USB_HUB_ST):

USB host HUBn port control register (UHUBn_CTRL) (n = 0, 1):

USB Host Endpoint Mode Control Register (UH_EP_MOD):

Controlled by the combination of bUH_EP_TX_EN and bUH_EP_TBUF_MOD, the USB host sends endpoint data buffer mode, refer to the table below.

by the combination of bUH_EP_RX_EN and bUH_EP_RBUF_MOD to control the USB host receiving endpoint data buffer Mode, refer to the table below.

USB Host receive buffer start address (UH_RX_DMA):

USB Host transmit start address (UH_TX_DMA):